The present invention relates to a filter configuration for quadrature amplitude modulated (QAM) signals. The filter configuration can be used in particular but not exclusively in a frequency range equalizer for such signals. The invention also relates to a slope detector for detecting a slope of the power spectrum of the QAM signal.
Quadrature amplitude modulation is employed particularly in the color television industry for modulation of two mutually independent signals, such as a luminance signal and a color difference signal, to a common carrier oscillation by modulation of its amplitude and phase. For a demodulation of the QAM signal back to the base band range, the QAM signal is multiplied by a (cosine) oscillation in phase with the original carrier and, respectively, by a (sine) oscillation phase-shifted by 90xc2x0 and is low-pass filtered, as a result of which two signal components are obtained. These signal components will be distinguished hereinafter by the designations I and Q.
Filter configurations for QAM signals modulated in this way generally include two largely identically configured channels for the two components of the signal. For instance from the article xe2x80x9cArchitecture and Circuit Design of a 6 GOPS Signal Processor for QAM Demodulator Applicationsxe2x80x9d by De Man et al., IEEE JSSC, Vol. 30, No. 3, March 1995, a filter configuration is known that has a first channel for a cosine demodulated component of the QAM signal and a second channel for a sine demodulated component of the QAM signal. The filter configuration also has a filter circuit, which receives the two signal components and for each signal component has one transfer function that is composed of terms that are in phase with this signal component and terms that are phase-shifted by xcfx80/2 and/or xe2x88x92xcfx80/2 with respect to it. The filter configuration further includes a cross branch for picking up signal components from the respectively other channel, wherein the signal components correspond to the phase-shifted terms of the transfer function. The cross branch is provided twice and each respective cross branch is fixedly assigned to one of the two channels.
Another filter configuration for demodulated QAM signals, also known from the above-cited article by de Man et al., is a slope detector which receives the two components of a QAM signal. The slope detector has a differential stage, which forms the difference between a received data value and the most recently received previous data value of the same component. The slope detector further has a multiplication stage, which forms the product of a difference value, derived from the first component, with a difference value derived from the second component. Separate channels for the two components are provided, and each channel includes one difference stage and one multiplication stage.
This doubling of circuit elements is complicated and expensive, and for an integrated embodiment of the filter configuration it requires a considerable substrate surface area.
It is accordingly an object of the invention to provide a filter configuration, such as a frequency range equalizer or a slope detector, for demodulated QAM signals which overcomes the above-mentioned disadvantages of the heretofore-known configurations of this general type and which substantially avoids the above-mentioned double expense.
With the foregoing and other objects in view there is provided, in accordance with the invention, a filter configuration for a demodulated QAM signal, including:
a first channel for a cosine demodulated QAM signal component;
a second channel for a sine demodulated QAM signal component;
a filter circuit for receiving the signal components, the filter circuit having transfer functions for the signal components, the transfer functions including terms in phase with the signal component of a respective one of the first an second channels and including terms phase-shifted by at least one of xcfx80/2 and xe2x88x92xcfx80/2 with respect to the signal component of the respective one of the first an second channels;
the filter circuit including a cross branch having an output and an input for picking up signal portions from a respective other one of the first and second channels, the signal portions corresponding to the terms of the transfer functions phase-shifted by at least one of xcfx80/2 and xe2x88x92xcfx80/2; and a switch configuration having a first state and a second state, the switch configuration, when being in the first state, connecting the input of the cross branch to the first channel and the output of the cross branch to the second channel, the switch configuration, when being in the second state, connecting the input of the cross branch to the second channel and the output of the cross branch to the first channel.
In the filter configuration described initially above, a first way of attaining the object of the invention is to provide a circuit configuration which in a first state connects the input of the cross branch to the first channel and the output of the cross branch to the second channel, and in a second state connects the input of the cross branch to the second channel and the output of the cross branch to the first channel. This provision makes it possible to assign the cross branch to the first and, respectively, to the second channel in alternation, so that only one cross branch is now required.
Preferably, the circuit configuration includes in each channel a switch, which passes arriving data to the channel or to the cross branch in alternation. As a result, data values of one component, which are needed only for generating phase-shifted terms in the respectively other channel, are suppressed in the channel at which they arrive. Thus the affected channel is relieved of processing tasks whose results are not needed later anyway.
The cross branch preferably includes a multiplier for multiplication by a weighting factor a. Particularly if the filter configuration of the invention is meant for use as a frequency range equalizer, transfer functions of the form
SI(z)=ia+zxe2x88x92T/2xe2x88x92iazxe2x88x92T
and
SQ(z)=xe2x88x92ia+zxe2x88x92T/2+iazxe2x88x92T
for the channels I and Q, respectively, can be implemented in it. T designates the clock period of the data of the demodulated signal components. Here, one multiplier suffices. The value of the factor a is expediently adjustable as a function of the distortion of the signal spectrum, and this distortion is measured by a slope detector. The cross branch also preferably includes a register for delaying a data value by the time T.
Each channel can be assigned one adder, and the circuit configuration delivers the output signal of the cross branch in alternation to one of the two adders for addition to the signal transmitted over the applicable channel.
A further simplification is obtained if instead of the two adders, each assigned to one channel, only one adder is provided, having a first input that is connected in alternation by a switch to the first and second channel, respectively, and having a second input that is connected to the output of the cross branch.
In accordance with another feature of the invention, the cross branch includes at least one delay register.
In accordance with yet another feature of the invention, the phase-shifted terms of one of the transfer functions are of equal magnitude and opposite to the phase-shifted terms of another one of the transfer functions.
In accordance with a further feature of the invention, a first adder assigned to the first channel and a second adder assigned to the second channel are provided. The first adder connects the output of the cross branch to the first channel, the second adder connects the output of the cross branch to the second channel.
In accordance with another feature of the invention, the first and second adders add signal portions transmitted via the cross branch with respectively different signs to respective ones of the signal components transmitted respectively via the first and second channels.
In accordance with yet a further feature of the invention, the filter configuration includes a switch and an adder having a first input alternately connected, via the switch, to the first and second channels, and having a second input connected to the output of the cross branch.
With the object of the invention in view there also provided, a slope detector, which is especially suitable for use in conjunction with the filter configuration of the invention. The slope detector includes:
a difference stage alternately receiving data values of a first component of a QAM signal and data values of a second component of the QAM signal for forming a respective difference between a data value and a most recently received previous data value of a respective one of the first and second components of the QAM signal;
a multiplication stage for forming a product of a difference value, derived from one of the first and second components of the QAM signal, and a further difference value derived from another one of the first and second components of the QAM signal; and the multiplication stage including a first register for storing one of the difference value and the further difference value derived alternately from the first and second components of the QAM signal.
In accordance with another feature of the invention, the first register of the slope detector is configured to output one of the difference value and the further difference value with a delay of half of a clock period.
In accordance with yet another feature of the invention, the multiplication stage includes a second register which is configured to output one of the difference value and the further difference value with a delay of one and a half clock periods. The multiplication stage further includes a switch and a multiplier, the switch connects the output of the first register and the output of the second register to the multiplier.
A second way of attaining the object is, in the slope controller described above, to configure the difference stage in such a way that it can receive data values of the first and second component in alternation, and to equip the multiplication stage with a first register which is configured for alternatingly storing difference values derived from the first and from the second component.
Preferably this first register outputs a received difference value with a delay of one clock period or half of a clock period, corresponding to the time interval between two successive data values.
In addition, a second register, which is configured to output the difference value with a delay of three clock periods or three half clock periods, and a switch, which in alternation connects the output of the first register and the output of the second register to a multiplier, can be provided.
Such slope controllers can be used in particular as a component of a filter configuration according to the invention, the filter configuration being used as a frequency range equalizer.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a filter configuration and slope detector for quadrature amplitude modulated signals, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.